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ACTS541MS
January 1996
Radiation Hardened Octal Three-State Buffer/Line Driver
Pinouts
20 LEAD CERAMIC DUAL-IN-LINE MIL-STD-1835 DESIGNATOR, CDIP2-T20, LEAD FINISH C TOP VIEW
OE1 A0 A1 A2 A3 A4 A5 A6 A7 1 2 3 4 5 6 7 8 9 20 VCC 19 OE2 18 Y0 17 Y1 16 Y2 15 Y3 14 Y4 13 Y5 12 Y6 11 Y7
Features
* Devices QML Qualified in Accordance with MIL-PRF-38535 * Detailed Electrical and Screening Requirements are Contained in SMD# 5962-96726 and Intersil's QM Plan * 1.25 Micron Radiation Hardened SOS CMOS * Total Dose . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . >300K RAD (Si) * Single Event Upset (SEU) Immunity: <1 x 10-10 Errors/Bit/Day (Typ) * SEU LET Threshold . . . . . . . . . . . . . . . . . . . . . . . >100 MEV-cm2/mg * Dose Rate Upset . . . . . . . . . . . . . . . . >1011 RAD (Si)/s, 20ns Pulse * Dose Rate Survivability . . . . . . . . . . . >1012 RAD (Si)/s, 20ns Pulse * Latch-Up Free Under Any Conditions * Military Temperature Range . . . . . . . . . . . . . . . . . . -55oC to +125oC * Significant Power Reduction Compared to ALSTTL Logic * DC Operating Voltage Range . . . . . . . . . . . . . . . . . . . . 4.5V to 5.5V * Input Logic Levels - VIL = 0.8V Max - VIH = VCC/2 Min * Input Current 1A at VOL, VOH * Fast Propagation Delay . . . . . . . . . . . . . . . . 21ns (Max), 14ns (Typ)
GND 10
20 LEAD CERAMIC FLATPACK MIL-STD-1835 DESIGNATOR, CDFP4-F20, LEAD FINISH C TOP VIEW
OE1 A0 A1 A2 A3 A4 A5 A6 A7 GND 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 VCC OE2 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7
Description
The Intersil ACTS541MS is a Radiation Hardened Octal Buffer/Line Driver, with three-state outputs. The output enable pins OE1, OE2 control the three-state outputs. If either enable is high the output will be in a high impedance state. For data output both enables must be low. The ACTS541MS utilizes advanced CMOS/SOS technology to achieve high-speed operation. This device is a member of a radiation hardened, high-speed, CMOS/SOS Logic family. The ACTS541MS is supplied in a 20 lead Ceramic Flatpack (K suffix) or a Ceramic Dual-In-Line package (D suffix).
Ordering Information
PART NUMBER 5962F9672601VRC 5962F9672601VXC ACTS541D/Sample ACTS541K/Sample ACTS541HMSR TEMPERATURE RANGE -55oC to +125oC -55oC to +125oC 25oC 25oC 25oC SCREENING LEVEL MIL-PRF-38535 Class V MIL-PRF-38535 Class V Sample Sample Die PACKAGE 20 Lead SBDIP 20 Lead Ceramic Flatpack 20 Lead SBDIP 20 Lead Ceramic Flatpack Die
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Copyright (c) Intersil Corporation 1999
Spec Number
1
518891 File Number 4094
ACTS541MS Functional Diagram
2 A0 OE1 OE2 19 3 A1 1 GND VCC 17 Y1 GND VCC 4 A2 16 Y2 GND VCC 15 Y3 GND VCC 6 A4 14 Y4 GND VCC 7 A5 13 Y5 GND VCC 12 Y6 GND VCC 11 Y7 10 20 GND VCC 18 Y0
5 A3
8 A6
9 GND VCC A7
TRUTH TABLE INPUTS OE1 L L H X OE2 L L X H An H L X X OUTPUTS Yn H L Z Z
NOTE: L = Low Logic Level, H = High Logic Level, Z = High Impedance
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
Spec Number 2
518891
ACTS541MS Die Characteristics
DIE DIMENSIONS: 102 mils x 102 mils 2,600mm x 2,600mm METALLIZATION: Type: AlSi Metal 1 Thickness: 7.125kA 1.125kA Metal 2 Thickness: 9kA 1kA GLASSIVATION: Type: SiO2 Thickness: 8kA 1kA WORST CASE CURRENT DENSITY: <2.0 x 105 A/cm2 BOND PAD SIZE: > 4.3 mils x 4.3 mils > 110m x 110m
Metallization Mask Layout
ACTS541MS
(20) VCC
(19) OE2
(1) OE1
(18) YO
(3) A1
(2) A0
A2 (4)
(17) Y1
A3 (5)
(16) Y2
NC
NC
NC
NC
A4 (6)
(15) Y3
A5 (7)
(14) Y4
GND (10)
Y7 (11)
A6 (8)
A7 (9)
Y6 (12)
Y5 (13)
Spec Number 3
518891

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